This invention relates to circuit packages employing macro-components such as chip carriers, and in particular to a method of bonding the component to a supporting substrate.
Packaging large scale integrated circuits utilizing hermetic ceramic chip carriers bonded to film circuits and printed circuit wiring boards is currently gaining increasing attention in the industry. Such packages enjoy many advantages over the standard dual-in-line (DIP) packages most often used for present packaging. For example, the chip carrier packages can be made smaller than DIP packages, and they are hermetic, testable, easily handled, and mechanically strong. Further, when there is a sufficient gap between the chip carrier and underlying substrate, interconnection wiring and film components can be placed under the carrier to conserve space. Other types of packages also require a sufficient gap between the macro-component and the underlying substrate. For example, certain packages employ thin or thick film resistor networks formed on a ceramic substrate which is in turn bonded to a supporting substrate including a thin or thick film circuit. Further, in many hybrid packages, a ceramic chip capacitor is also bonded to a supporting substrate including a thin or thick film circuit.
One problem associated with such packaging schemes involves the method used to bond the macro-component to the substrate. The usual practice is to solder bond by means of solder printing or dipping. This usually results in a lap joint less than 3 mils thick. This small gap between component and substrate makes it difficult to include film components on the area of the substrate underneath the bonded component. In particular, difficulties in cleaning and encapsulation of such areas arise with such a small gap distance. Further, the reliability of such solder joints is questionable due to intermetallic compounds which are formed as a result of the low ratio of solder to soluble metals in the contact pads. Finally, the lap joints tend to be mechanically stiff.
It is therefore a primary object of the invention to provide a circuit package with a strong and reliable bond between the macro-component and supporting substrate and with a sufficiently large gap between macro-component and substrate to include further components on the substrate thereunder.